Electrostatic discharge (ESD) protection design is a major factor in the reliability of deep-submicron CMOS Integrated Circuits (IC's). The device size and the thickness of the gate oxide of CMOS devices are being continually reduced to improve the operating speed of the CMOS devices and integration density of the IC's. These highly scaled-down devices, however, have been found to be increasingly vulnerable to ESD. Therefore, ESD protection circuits have been added into the CMOS IC's to protect the IC's against ESD damage. Typically, ESD protection circuits are implemented around the input, output and supply pads of the IC's to bypass ESD current away from the internal circuits of the IC's.
There are three main types of ESD events: Human Body Model (HBM), Machine Model (MM) and Charged Device Model (CDM). In the HBM and MM, respectively, the discharge current of the ESD event is from the outside of the IC into the inside of the IC, through the input or output or supply pins. Therefore, the ESD protection circuit is designed to shunt away the ESD current from the internal parts of the IC. In the CDM, the ESD voltage does not come from outside the IC, but rather from the IC itself. The substrate of the IC is assumed to be charged and then a pin of the IC is shorted to ground in a CDM ESD event. The CDM ESD current is discharged from the inside of the IC to the outside of the IC.